Düşük güç tüketimli H.264 çözücü için ters dönüşüm & niceleme ve bloklama süzgecinin donanımsal gerçeklenmesi.

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Tezin Türü: Yüksek Lisans

Tezin Yürütüldüğü Kurum: Orta Doğu Teknik Üniversitesi, Mühendislik Fakültesi, Elektrik ve Elektronik Mühendisliği Bölümü, Türkiye

Tezin Onay Tarihi: 2009

Tezin Dili: İngilizce

Öğrenci: Önder Önsay

Danışman: GÖZDE AKAR

Özet:

Mobile devices such as PDAs and cellular phones became indispensible part of business and entertainment world. There are a number of applications run on these devices and they tend to increase day by day causing devices tend to consume more battery power. H.264/AVC is an emerging video compression standard that is likely to be used widely in multimedia environments. As a mobile application, video compression algorithm of H.264 standard has a complex structure that increase the power demand of realizing hardware. In order to reduce this power demand, power consuming parts of the algorithm like deblocking filter and transform&quantization need to be specifically changed for low power application. A low power deblocking filter and inverse transform/quantization algorithm for H.264/AVC decoder is to be proposed and implemented on FPGA.