Akademik Veri Yönetim Sistemi
Tezin Türü: Doktora
Tezin Yürütüldüğü Kurum: Orta Doğu Teknik Üniversitesi, Mühendislik Fakültesi, Elektrik ve Elektronik Mühendisliği Bölümü, Türkiye
Tezin Onay Tarihi: 2012
Tezin Dili: İngilizce
Öğrenci: Burhan Gültekin
Danışman: MUAMMER ERMİŞ
Özet:This research and development work deals with the design methodology for Cascaded Multilevel Converter (CMC) based Transmission STATCOM (TSTATCOM) and development of a ±12MVAR, 12kV line-to-line wye-connected, 11-level CMC. This CMC module constitutes the basic building block of TSTATCOM systems. Sizing of the CMC module, number of H-Bridges in each phase of the CMC, AC voltage rating of the CMC, the number of paralleled CMC modules in the T-STATCOM system, optimum value of series filter reactors and determination of busbar in the power grid to which the T-STATCOM system is going to be connected are also discussed in the thesis in view of IEEE Std.519-1992, current status of HV IGBT technology and the required reactive power variation range for the T-STATCOM application. In the field prototype of the CMC module, the AC voltages are approximated to sinusoidal waves by Selective Harmonic Elimination Method (SHEM) and by the use of an optimized series input filter reactor. The use of n number of HBs in each phase provides us n number of freedom in the application of SHEM. One of them is allocated to the fundamental component while n-1 is for the elimination of low order harmonics. Since n is chosen to five in the prototype system, 5th, 7th,11th and 13th harmonic components are successfully eliminated in the AC voltage waveforms of the CMC module. The equalization of DC link capacitor voltages is achieved according to Modified Selective Swapping (MSS) algorithm. MSS is applied every 400μs period if needed to obtain a perfect equalization of DC link capacitor voltages at the expense of higher switching frequency and hence switching losses. In this research work, an L-shaped laminated bus has been designed and the HV IGBT driver circuit has been modified for optimum switching performance of HV IGBT modules in each HB circuit. The performances of the HB circuit and the resulting 11-level CMC module have been obtained not only in the laboratory but also in the field. Design works for HB and the CMC are based on MATLAB and PSCAD simulations. The laboratory and field performance of the HB circuit and CMC module is found to be satisfactory and quite consistent with the theoretical results and design objectives. In addition to these, 154 kV, ±50MVAr T-STATCOM prototype has been designed, implemented and installed at Sincan Transformer Substation-Ankara primarily for the purposes of reactive power compensation and terminal voltage regulation. The T-STATCOM prototype is composed of five parallel operated CMC modules developed within the scope of this PhD thesis research work. The T-STATCOM configuration permits the operation of any number of CMC modules in the range from one to five for experimental purposes. The performance of this T-STATCOM system is also presented in this PhD thesis as a sample application.