Roadmap for machine learning based network-on-chip (M/L NoC) technology and its analysis for researchers


Balamurugan K., Umamaheswaran S., Mamo T., Nagarajan S., Namamula L. R.

JOURNAL OF PHYSICS COMMUNICATIONS, vol.6, no.2, 2022 (Journal Indexed in ESCI) identifier identifier

  • Publication Type: Article / Review
  • Volume: 6 Issue: 2
  • Publication Date: 2022
  • Doi Number: 10.1088/2399-6528/ac4dd5
  • Title of Journal : JOURNAL OF PHYSICS COMMUNICATIONS
  • Keywords: NOC, machine learning NoC, 3D NoC, 3.5D NoC, 2.5D NoC, NoC security, ROUTING ALGORITHM, ARCHITECTURE

Abstract

A few decades ago, communication inside the chip is done by transferring signals between the cores. This conventional method is not worthy because of the increase in latency and power consumption. To rectify this issue Network-on-Chip (NoC) technology has emerged. NoC technology is invented to transfer data packets instead of signals. Machine Learning NoC (M/LNoC) is a very fast-growing technology in today's Integrated Circuit world for the communication between Intellectual property (IP) cores. The machine learning algorithms are used in the existing and emerging novel NoCs. In this paper, various evolving NoC technologies to decrease the transfer latency, power consumption of the IC is addressed for the implementation of the machine learning algorithm. The NoCs working with machine learning algorithms are called M/L NoC. We also provided the security issues to be focused- on in the M/L NoC. Also, we have provided the available NoC tools for the NoC researchers.