Research Information System
29th IEEE Workshop on Signal and Power Integrity, SPI 2025, Gaeta, Italy, 11 - 14 May 2025, (Full Text)
Shadow voiding is a critical technique for optimizing second-level interconnect (SLI) designs in microelectronic packages, aiming to minimize impedance mismatches while adhering to manufacturing and electrical constraints. This paper introduces a tree-based active learning algorithm for shadow void optimization. The proposed method efficiently explores geometric design parameters using decision trees and truncated SVD to reduce dimensionality. High-performing designs are identified via penalized regression within partitioned subspaces and evaluated through sequential sampling. The algorithm is applied to a 7-2-7 package, demonstrating significant improvements in electrical performance and computational efficiency. Results show that tree-based learners effectively characterize the design space, making them a practical solution for high-dimensional optimization problems in microelectronics.