FPGA implementation of bearing tracking using passive array for underwater acoustics


Cavuslu M. A. , Tugac S., Oner M.

MICROPROCESSORS AND MICROSYSTEMS, vol.87, 2021 (Journal Indexed in SCI) identifier identifier

  • Publication Type: Article / Article
  • Volume: 87
  • Publication Date: 2021
  • Doi Number: 10.1016/j.micpro.2021.104366
  • Title of Journal : MICROPROCESSORS AND MICROSYSTEMS
  • Keywords: FPGA, MVDR, Fixed point, Bearing estimation, FREQUENCY, MVDR

Abstract

Within the scope of this study, a Field Programmable Gate Array (FPGA) based system which calculates bearing angles by analyzing the signals emitted by vessels in underwater environment is proposed. An array consisting of 3 non-directional hydrophones were designed and used in tests. Minimum Variance Distortionless Response (MVDR) algorithm was used in the bearing calculations according to the reference hydrophone. In marine tests, hydrophone array was integrated into the buoy, and then tested. The angle between the reference hydrophone and the magnetic north is calculated in order to correct the errors caused by the immobility of the buoy and underwater array. In the developed system, all operations were carried out on Artix 7 FPGA. Fixed point number format is used and implementation stages are designed as pipeline architecture. In the marine tests performed, it was monitored in real time that the bearing information calculated by the system was compatible with the route of the vessel used in the tests. The signals received by bearing information and the hydrophones were recorded. The records were run offline, and the calculated values were compared. The results obtained showed that the developed FPGA-based system successfully calculates the bearing angle of the vessels by passive listening.