Model Predictive Controller Utilized as an Observer for Inter-Turn Short Circuit Detection in Induction Motors

Sahin I., KEYSAN O.

IEEE TRANSACTIONS ON ENERGY CONVERSION, cilt.36, sa.2, ss.1449-1458, 2021 (SCI-Expanded) identifier identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 36 Sayı: 2
  • Basım Tarihi: 2021
  • Doi Numarası: 10.1109/tec.2020.3048071
  • Dergi Adı: IEEE TRANSACTIONS ON ENERGY CONVERSION
  • Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Academic Search Premier, Aerospace Database, Applied Science & Technology Source, Business Source Elite, Business Source Premier, Communication Abstracts, Compendex, Computer & Applied Sciences, INSPEC, Metadex, Civil Engineering Abstracts
  • Sayfa Sayıları: ss.1449-1458
  • Anahtar Kelimeler: Circuit faults, Stator windings, Fault detection, Rotors, Predictive control, Mathematical model, Inverters, Fault diagnosis, condition monitoring, finite control set model predictive control (FCS-MPC), inter-turn short circuit (ITSC), inverter statistics, FAULT-DETECTION, MACHINES, DIAGNOSIS, LOCATION
  • Orta Doğu Teknik Üniversitesi Adresli: Evet

Özet

In this paper, a novel and non-invasive stator inter-turn short circuit (ITSC) online detection method is presented for an induction machine (IM), driven by a two-level voltage source inverter (2L-VSI) via finite control set model predictive control (FCS-MPC). The main idea of the proposed method is to utilize the controller itself as an observer: under the presence of a fault, the distribution of inverter switching states significantly deviates from the original balanced case. Therefore, by inspecting the inverter switching vectors, which are the outcomes of the FCS-MPC routine's online optimization procedure, a stator fault can be detected efficiently. It is observed that both the zero-vector allocation over the complex plane and the allocation among the active vectors are influenced by the presence of a stator short-circuit fault. The proposed fault detection strategy introduces little to no extra burden for processor and memory. Experimental results verify the proposed method, and inter-turn short circuits of two and three turns are confidently detected and located for a 500 W, two-pole IM.