Akademik Veri Yönetim Sistemi
ION Pacific PNT Meeting, Hawaii, Amerika Birleşik Devletleri, 23 - 25 Nisan 2013, ss.1003-1009
This paper presents a novel design of a high resolution CMOS based current to frequency converter (CFC), also known as integrating analog to digital converter (IADC), especially for current output navigation grade accelerometers. Different from the traditional design, positive and negative input currents are separated from each other to eliminate the error due to both comparator offset voltages and mismatch in the value of integrating capacitor. Also, the output current of the accelerometer is directly integrated to get rid of any error originated from resistive current divider circuitry by the help of a superior folded cascode operational amplifier with Monticelli output stage. This operational amplifier can drive 150 mA by dissipating only 600 mu A quiescent current at the output stage. In addition, a current equalization mechanism is added to the circuit in order to reduce scale factor asymmetry errors. This mechanism equates positive and negative feedback currents at each temperature; as a result scale factor asymmetry error is reduced to 20 ppm without any calibration. Cadence simulations show that the resolution of the circuit is improved to 0.00064 feet/sec by using commercially available 0.35-mu m CMOS technology. The chip size with pads is only 8.38 mm(2), therefore it is very suitable for volume restricted Inertial Measurement Units (IMU).