Capacitor Current Minimization Algorithm for Asymmetric Interleaved DC/DC Converters
2025 Energy Conversion Congress and Expo Europe-ECCE Europe, Birmingham, İngiltere, 1 - 04 Eylül 2025, (Tam Metin Bildiri)
- Yayın Türü: Bildiri / Tam Metin Bildiri
- Doi Numarası: 10.1109/ecce-europe62795.2025.11238873
- Basıldığı Şehir: Birmingham
- Basıldığı Ülke: İngiltere
- Orta Doğu Teknik Üniversitesi Adresli: Evet
Özet
This paper introduces an analytical algorithm for minimizing the output capacitor RMS current in asymmetric multi-input interleaved converters. By jointly considering the first and second harmonics of the capacitor current, the method determines optimal phase shifts between converter modules without requiring iterative computation. Experimental validation on two- and three-module three-level boost converters confirms that the proposed technique accurately predicts the phase angles that achieve minimal capacitor current. Reducing the capacitor RMS current not only lowers losses but also enhances reliability and extends component lifetime.