This paper reports the development of a low-cost CMOS microbolometer focal plane array with a new temperature coefficient enhancement readout circuit. We have recently reported an uncooled microbolometer detector that uses the CMOS n-well layer as the active material, where the suspended and thermally isolated n-well structure is obtained by silicon bulk micromachining of fabricated CMOS dies. In addition, we have successfully fabricated a 16x16 n-well microbolometer FPA. Although n-well is single crystal silicon and has very low 1/f noise, the fabricated array performance was limited due to low TCR of the n-well. The n-well. has a TCR of 0.50-0.70%/K, which is the highest among the CMOS layers, but lower compared to the state-of-the-art microbolometer materials whose TCR values are about 2-3%/K. This paper reports a new n-well microbolometer FPA with a readout circuit that enhances the temperature coefficient (TC) of the microbolometer current, compensating for the low TCR value of the detector. The TC enhancement is achieved by passing the pixel current through a 4(th) power taking circuit prior to integration, increasing the pixel current TC four times and resulting in an effective TC of 2.0-2.8%/K. A 16xl6 test array has been designed and fabricated using a 0.8mum standard CMOS process. The chip measures 2.4x3.8 mm(2) and contains 80mumx80mum microbolometer pixels with 13% fill factor. The measurements and calculations show that the 16xl6 prototype FPA can provide a responsivity (R) of 2x10(7)V/W, a detectivity (D*) of 1.68x10(9)cmrootHz/W, and NETD of 290mK at a scanning rate of 260fps. The same NETD value can be obtained for a 128x128 pixel array operating at 30fps. NETD can further be decreased by improving the noise performance of the readout circuit, since the performance is not limited by the n-well microbolometer noise.