This paper presents a CMOS integrated interface circuit for piezoelectric energy harvesters (PEH). A fully self-powered circuit, based on Synchronous Electric Charge extraction (SECE) technique, is implemented for non-resonant piezoelectric harvesters generating low power, in 10s to 100s mu W range. The circuit is realized in standard 180 nm UMC CMOS technology. A switch control circuit is designed and optimized to extract maximum power independently from excitation changes of the PEH. The total power loss of the switch control circuit is reduced to 3.6 mu W. The simulations with an output voltage range of 1.1 to 4 V show maximum power conversion efficiency of 83% (at 4 V) for a higher power PEH module, and maximum power conversion efficiency of 75% (at 2.6 V) for a lower power PEH module.