Post-annealing Temperature Effect on Electrical Properties of Al2O3 Films on Silicon by Atomic Layer Deposition for Solar Cell Applications


Dönerçark E., İmer M. B. , Turan R.

MRS Fall Meeting & Exhibit 2018, Massachusetts, United States Of America, 25 November 2018 - 30 November 2019, pp.956

  • Publication Type: Conference Paper / Summary Text
  • City: Massachusetts
  • Country: United States Of America
  • Page Numbers: pp.956

Abstract

Silicon wafers, being the most dominant and almost inevitable material for solar cell production, require surface passivation to increase the solar cell efficiency by decreasing recombination losses. For this reason, several research groups are currently focused on the usage of thin alumina (Al2O3) as a passivation layer. The success of Tunnel Oxide Passivating CONtact (TOPCon) solar cell, Passivated Emitter Rear Totally diffused (PERT) solar cell and Passivated Emitter Rear solar cell (PERC) structures demonstrate enhanced passivation quality of crystalline silicon (c-Si) solar cells with Al2Ofilms [1]. The determining parameters for the passivation quality of Al2Ocan be summarized as interface trap states (Dit), fixed charge density (Qf) and flat band voltage (VFB). Due to enhanced field effect passivation quality of thin Al2O3 layer, high ratio Qf can be accomplished. Qf has been reported as high as 1 - 4x1012 cm-2 in literature by several research groups and this charge density is sensitive to both deposition conditions and post-thermal treatments [2]. In addition to field effect passivation, Al2O3 layer also provides chemical passivation with relatively low density of Dit [5]. In this context, the effect of different deposition conditions and post-annealing temperatures on Al2O3 films formed by atomic layer deposition (ALD) were investigated using conductance method to identify and clarify relation between interface properties and fixed charge densities under initial deposition conditions varying in between160 - 200°C in combined with various post-annealing conditions (400°C to 600°C for 30 minutes). C-V and G-V measurements were done for each sample with various frequencies from 1kHz to 5MHz. From C-V measurements, the oxide capacitance and VFB values were calculated and conductance method was applied to determine Dit values. It was shown that Qf decreased when the post-thermal annealing was applied. The highest Qf was -5.13x1013 cm-2 and the lowest one was -2.43x1011 cm-2. Dit decreased at 400°C post-annealing temperature for different deposition temperatures. The highest Dit value was 2.79x1013 cm-2eV-1 and the lowest one was 2.39x1011 cm-2eV-1. The lowest Dit was found at 400°C post-thermal annealing temperature under N2 ambient with 165°C prior deposition temperature. It was concluded that when Qf values increase, Dit values also increase. High variation on VFB was found where it changed in between 1.09V to 4.19V.