Akademik Veri Yönetim Sistemi
Journal of Micromechanics and Microengineering, cilt.35, sa.12, ss.1-14, 2025 (Hakemli Dergi)
A memristor-free MEMS neuristor utilizing Fowler–Nordheim (F–N) tunneling and voltage hysteresis in capacitive micromachined ultrasonic transducers (CMUTs) is developed and characterized experimentally. Collapse-snapback hysteresis in CMUT membrane deflection and F–N tunneling, yielding the electrical contact onset voltage (ECOV), are two unique attributes of doped polysilicon dimples in the membrane. Based on these distinctions, the MEMS neuristor achieves threshold-based spike output without memristive elements. This approach thereby overcomes the stochasticity inherent to conventional neuristor designs. Microfabricated CMUTsoperate in resistive and capacitive modes, determined by their F–N ECOV of ∼40 V. Resistance measurements of resistive-mode CMUTs presented a shark-fin-type behavior, with an average contact resistance of 4.5 kΩ. The resonance frequency of these CMUTs, with a collapse voltage of 77 V, can be adjusted between 260 kHz and 190 kHz by varying the DC bias between 70 V and 75.5 V, thanks to the spring softening effect. Capacitive mode CMUTs with a collapse voltage of 33 V have a frequency range of 140–90 kHz between 25–30 V DC bias. This tunable resonance frequency of CMUTs provides adjustable input pulse features for the super-threshold response of the MEMS neuristor. Capacitive mode CMUTs show short-term and long-term plasticity (STP, LTP) depending on the applied DC bias relative to snapback voltage. In contrast, resistive mode CMUTs inherently illustrate STP in operation. Using the simulation and experimental results of the CMUTs, the circuit analysis of the MEMS neuristor revealed sub- and super-threshold responses. Thanks to the F–N tunneling mechanism and MEMS-based CMUT technology, the neuristor offers a pathway to overcome the limitations of memristor-based devices, providing potential for reliability and an intrinsic physical off-switch that provides a software-agnostic fail-safe for hardware-level security.