A hybrid silicon microaccelerometer system with CMOS interface circuit
43rd IEEE Midwest Symposium on Circuits and Systems, Michigan, United States Of America, 8 - 11 August 2000, pp.228-231, (Full Text)
- Publication Type: Conference Paper / Full Text
- Volume:
- City: Michigan
- Country: United States Of America
- Page Numbers: pp.228-231
- Middle East Technical University Affiliated: No
Abstract
This paper presents a hybrid microaccelerometer subsystem consisting of an all-silicon pg capacitive microaccelerometer and a low noise CMOS capacitive interface circuit. This accelerometer has a measured sensitivity of 1.4 muF/g for a device with 2mm a lmm proof mass and 1.4pm air gap. The calculated mechanical noise floor for the device is 0.39 mug/vHz in atmosphere. The circuit has a 95dB dynamic range; a low offset of 370 muV and can resolve better than 75aF. The overall sensitivity of the complete module is measured as 160mV/g with a noise floor of 3.6 muV/vRz (-110dBV/vHz), indicating that the current system is capable of resolving about 20 mug/vHz.