Görüntüleme sensörlerini sürme ve sensörlerden veri alma için uygulamaya özel sayısal programlanabilir tümdevre.


Tezin Türü: Yüksek Lisans

Tezin Yürütüldüğü Kurum: Orta Doğu Teknik Üniversitesi, Türkiye

Tezin Onay Tarihi: 2014

Tezin Dili: İngilizce

Öğrenci: Nusret Bayhan

Eş Danışman: TAYFUN AKIN, SELİM EMİNOĞLU

Özet:

This thesis explains the implementation of a digital programmable Application Specific Integrated Circuit (ASIC) designed for imaging applications. The primary function of this ASIC is to drive imaging sensors and to do basic processing on the digital video data coming from the sensors. The ASIC is designed to handle the communication between the imaging sensor and the system. Using command based high-level instructions, this two-way communication is simplified. The ASIC can also be used to store and update the sensor memory content using this communication interface. The ASIC has a built in data path that can process the digital sensor data in real time while the sensor is being operated. This data path is capable of performing both arithmetic and encoding operations on the sensor data. The arithmetic operations are handled by an integrated arithmetic unit placed on the data path. This unit can be used to correct and enhance the sensor data at the pixel level using a reduced set of special commands and instructions. The ASIC also has a built in 8bit/10bit data encoder at the end of its data path, which is integrated to support high speed serial data interfaces by providing a DC-balanced digital output data. The ASIC has an integrated programmable timing generator designed to generate the necessary timing signals for the imaging sensors and their peripherals. This module can be programmed to generate periodic timing signals at the period of line or frame times of the imaging sensor. The logic implemented in the ASIC is simulated, synthesized, placed and routed in sequence using automated digital design tools using Hardware Description Language (HDL) design capture. Since IC implementation is typically expensive, the designed logic is first implemented and verified at FPGA level to assure its functionality. The results of both implementations show that IC implementation is advantageous in terms of power and area for a given speed at the expense of its cost.