Ismailoglu, A. N. And Askar, M. 2008. SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation. 11th Euromicro Conference on Digital System Design , (Parma, Italy), 566-571.

Ismailoglu, A. N., & Askar, M., (2008). SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation . 11th Euromicro Conference on Digital System Design (pp.566-571). Parma, Italy

Ismailoglu, A., And Murat Askar. "SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation," 11th Euromicro Conference on Digital System Design, Parma, Italy, 2008

Ismailoglu, A. N. And Askar, Murat. "SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation." 11th Euromicro Conference on Digital System Design , Parma, Italy, pp.566-571, 2008

Ismailoglu, A. N. And Askar, M. (2008) . "SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation." 11th Euromicro Conference on Digital System Design , Parma, Italy, pp.566-571.

@conferencepaper{conferencepaper, author={A. Neshn Ismailoglu And author={Murat Askar}, title={SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation}, congress name={11th Euromicro Conference on Digital System Design}, city={Parma}, country={Italy}, year={2008}, pages={566-571} }